Blog

Notes from the lab.

Engineering write-ups, project updates and community stories from the OpenR5 team.

Open silicon

Why we are building open RISC-V cores

The thinking behind OpenR5: why processors should be readable, verifiable and free to build on.

Coming soon
Verification

How we verify our cores

Test suites, reference-model comparison and how you can rerun every result yourself.

Coming soon
Developers

From clone to passing tests

A step-by-step walkthrough of building a core, running its tests and taking it to an FPGA.

Coming soon
Security

Designing small, auditable processors

What goes into a security-focused core, and how to keep the trusted base small.

Coming soon
Community

How to contribute to OpenR5

Where to start, how reviews work, and the kinds of help we are looking for.

Coming soon

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